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feat(riscv): relocate .trap machinery to RAM #541

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Merged
MabezDev merged 3 commits into from
May 26, 2023
Merged

feat(riscv): relocate .trap machinery to RAM #541

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fa671bb
feat: relocate riscv isr to iram
sethp May 10, 2023
3ade203
feat(riscv): place .trap in RAM
sethp May 15, 2023
a0bfca5
docs: Update CHANGELOG.md
sethp May 22, 2023
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12 changes: 10 additions & 2 deletions esp32c2-hal/ld/bl-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -56,12 +56,19 @@ SECTIONS {
KEEP(*(.init));
KEEP(*(.init.rust));
KEEP(*(.text.abort));
KEEP(*(.trap));
KEEP(*(.trap.rust));
} > ROTEXT
}
INSERT BEFORE .text;

SECTIONS {
.trap : ALIGN(4)
{
KEEP(*(.trap));
*(.trap.*);
} > RWTEXT
}
INSERT AFTER .rwtext;

SECTIONS {
/**
* This dummy section represents the .text section but in rodata.
Expand All @@ -86,6 +93,7 @@ SECTIONS {
. = ALIGN(ALIGNOF(.rwtext));
. = . + SIZEOF(.rwtext);
. = . + SIZEOF(.rwtext.wifi);
. = . + SIZEOF(.trap);
} > RWDATA
}
INSERT BEFORE .data;
Expand Down
4 changes: 2 additions & 2 deletions esp32c2-hal/ld/db-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -55,8 +55,6 @@ SECTIONS
KEEP(*(.init.rust));
KEEP(*(.text.abort));
. = ALIGN(4);
KEEP(*(.trap));
KEEP(*(.trap.rust));

*(.text .text.*);
_etext = .;
Expand Down Expand Up @@ -93,6 +91,8 @@ SECTIONS
_srwtext = .;
*(.rwtext);
. = ALIGN(4);
KEEP(*(.trap));
*(.trap.*);
_erwtext = .;
} > REGION_RWTEXT
_rwtext_size = _erwtext - _srwtext + 8;
Expand Down
12 changes: 10 additions & 2 deletions esp32c3-hal/ld/bl-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -56,12 +56,19 @@ SECTIONS {
KEEP(*(.init));
KEEP(*(.init.rust));
KEEP(*(.text.abort));
KEEP(*(.trap));
KEEP(*(.trap.rust));
} > ROTEXT
}
INSERT BEFORE .text;

SECTIONS {
.trap : ALIGN(4)
{
KEEP(*(.trap));
*(.trap.*);
} > RWTEXT
}
INSERT AFTER .rwtext;

SECTIONS {
/**
* This dummy section represents the .text section but in rodata.
Expand All @@ -86,6 +93,7 @@ SECTIONS {
. = ALIGN(ALIGNOF(.rwtext));
. = . + SIZEOF(.rwtext);
. = . + SIZEOF(.rwtext.wifi);
. = . + SIZEOF(.trap);
} > RWDATA
}
INSERT BEFORE .data;
Expand Down
4 changes: 2 additions & 2 deletions esp32c3-hal/ld/db-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -55,8 +55,6 @@ SECTIONS
KEEP(*(.init.rust));
KEEP(*(.text.abort));
. = ALIGN(4);
KEEP(*(.trap));
KEEP(*(.trap.rust));

*(.text .text.*);
_etext = .;
Expand Down Expand Up @@ -93,6 +91,8 @@ SECTIONS
_srwtext = .;
*(.rwtext);
. = ALIGN(4);
KEEP(*(.trap));
*(.trap.*);
_erwtext = .;
} > REGION_RWTEXT
_rwtext_size = _erwtext - _srwtext + 8;
Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/ld/mb-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ SECTIONS
KEEP(*(.text.abort));
. = ALIGN(4);
KEEP(*(.trap));
KEEP(*(.trap.rust));
*(.trap.*);

*libriscv-*.rlib:riscv.*(.literal .text .literal.* .text.*);
*libesp_riscv_rt-*.rlib:esp-riscv-rt.*(.literal .text .literal.* .text.*);
Expand Down
11 changes: 9 additions & 2 deletions esp32c6-hal/ld/bl-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -60,12 +60,19 @@ SECTIONS {
KEEP(*(.init));
KEEP(*(.init.rust));
KEEP(*(.text.abort));
KEEP(*(.trap));
KEEP(*(.trap.rust));
} > ROTEXT
}
INSERT BEFORE .text;

SECTIONS {
.trap : ALIGN(4)
{
KEEP(*(.trap));
*(.trap.*);
} > RWTEXT
}
INSERT AFTER .rwtext;

SECTIONS {
/**
* Bootloader really wants to have separate segments for ROTEXT and RODATA
Expand Down
4 changes: 2 additions & 2 deletions esp32c6-hal/ld/db-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -60,8 +60,6 @@ SECTIONS
KEEP(*(.init.rust));
KEEP(*(.text.abort));
. = ALIGN(4);
KEEP(*(.trap));
KEEP(*(.trap.rust));

*(.text .text.*);
_etext = .;
Expand Down Expand Up @@ -98,6 +96,8 @@ SECTIONS
_srwtext = .;
*(.rwtext);
. = ALIGN(4);
KEEP(*(.trap));
*(.trap.*);
_erwtext = .;
} > REGION_RWTEXT
_rwtext_size = _erwtext - _srwtext + 8;
Expand Down
11 changes: 9 additions & 2 deletions esp32h2-hal/ld/bl-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -54,12 +54,19 @@ SECTIONS {
KEEP(*(.init));
KEEP(*(.init.rust));
KEEP(*(.text.abort));
KEEP(*(.trap));
KEEP(*(.trap.rust));
} > ROTEXT
}
INSERT BEFORE .text;

SECTIONS {
.trap : ALIGN(4)
{
KEEP(*(.trap));
*(.trap.*);
} > RWTEXT
}
INSERT AFTER .rwtext;

SECTIONS {
/**
* Bootloader really wants to have separate segments for ROTEXT and RODATA
Expand Down
4 changes: 2 additions & 2 deletions esp32h2-hal/ld/db-riscv-link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -60,8 +60,6 @@ SECTIONS
KEEP(*(.init.rust));
KEEP(*(.text.abort));
. = ALIGN(4);
KEEP(*(.trap));
KEEP(*(.trap.rust));

*(.text .text.*);
_etext = .;
Expand Down Expand Up @@ -98,6 +96,8 @@ SECTIONS
_srwtext = .;
*(.rwtext);
. = ALIGN(4);
KEEP(*(.trap));
*(.trap.*);
_erwtext = .;
} > REGION_RWTEXT
_rwtext_size = _erwtext - _srwtext + 8;
Expand Down