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Fix C2
  • Loading branch information
bugadani committed Aug 7, 2023
commit 35eb4a49c477155078e0962bea9a8b1c4664be55
2 changes: 2 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- Increase frequency resolution in `set_periodic` (#686)
- Fixed ESP32-S3 radio clock gating (#679)
- Fixed ESP32-S2 radio clock gating (#681)
- Fixed ESP32 and ESP32-S2 radio clock gating (#681)
- Fixed ESP32, ESP32-S2, ESP32-C2 radio clock gating (#681)

### Removed

Expand Down
34 changes: 17 additions & 17 deletions esp-hal-common/src/soc/esp32c2/radio_clocks.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,7 @@ use crate::system::{RadioClockControl, RadioClockController, RadioPeripherals};
// 19, 20, 21, 22, 23
const SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M: u32 = 0x78078F;
// SYSTEM_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030
// from experiments `0x00FB9FCF` is not enough for esp-wifi to work
const SYSTEM_WIFI_CLK_EN: u32 = 0xFFFFFFFF;
const SYSTEM_WIFI_CLK_EN: u32 = 0x00FB9FCF;

impl RadioClockController for RadioClockControl {
fn enable(&mut self, peripheral: RadioPeripherals) {
Expand Down Expand Up @@ -42,31 +41,27 @@ impl RadioClockController for RadioClockControl {
}

fn enable_phy() {
let system = unsafe { &*esp32c2::SYSTEM::PTR };
system
.perip_clk_en1
// `periph_ll_wifi_bt_module_enable_clk_clear_rst`
let syscon = unsafe { &*esp32c2::APB_CTRL::PTR };
syscon
.wifi_clk_en
.modify(|r, w| unsafe { w.bits(r.bits() | SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M) });
}

fn disable_phy() {
let system = unsafe { &*esp32c2::SYSTEM::PTR };
system
.perip_clk_en1
// `periph_ll_wifi_bt_module_disable_clk_set_rst`
let syscon = unsafe { &*esp32c2::APB_CTRL::PTR };
syscon
.wifi_clk_en
.modify(|r, w| unsafe { w.bits(r.bits() & !SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M) });
}

fn common_wifi_bt_clock_enable() {
let system = unsafe { &*esp32c2::SYSTEM::PTR };
system
.perip_clk_en1
.modify(|r, w| unsafe { w.bits(r.bits() | SYSTEM_WIFI_CLK_EN) });
// `periph_ll_wifi_module_enable_clk_clear_rst`, no-op
}

fn common_wifi_bt_clock_disable() {
let system = unsafe { &*esp32c2::SYSTEM::PTR };
system
.perip_clk_en1
.modify(|r, w| unsafe { w.bits(r.bits() & !SYSTEM_WIFI_CLK_EN) });
// `periph_ll_wifi_module_disable_clk_clear_rst`, no-op
}

fn reset_mac() {
Expand All @@ -81,10 +76,15 @@ fn reset_mac() {
}

fn init_clocks() {
// from `esp_perip_clk_init`
const SYSTEM_WIFI_CLK_UNUSED_BIT5: u32 = 1 << 5;
const SYSTEM_WIFI_CLK_UNUSED_BIT12: u32 = 1 << 12;
const WIFI_BT_SDIO_CLK: u32 = SYSTEM_WIFI_CLK_UNUSED_BIT5 | SYSTEM_WIFI_CLK_UNUSED_BIT12;

let syscon = unsafe { &*esp32c2::APB_CTRL::PTR };
syscon
.wifi_clk_en
.modify(|_, w| unsafe { w.bits(0xffffffff) });
.modify(|r, w| unsafe { w.bits(r.bits() & !WIFI_BT_SDIO_CLK | SYSTEM_WIFI_CLK_EN) });
}

fn ble_rtc_clk_init() {
Expand Down