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Fix ESP32 radio clock code writing incorrect registers #709

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Merged
bjoernQ merged 2 commits into from
Aug 8, 2023
Merged

Fix ESP32 radio clock code writing incorrect registers #709

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97d587d
Fix ESP32 radio clocks
bugadani Jul 25, 2023
2b62a19
Blanket-enable radio clocks
bugadani Aug 7, 2023
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Blanket-enable radio clocks
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@bugadani
bugadani committed Aug 7, 2023
commit 2b62a195f2abca407a632e6fe9a47f9c60bb1a15
3 changes: 2 additions & 1 deletion CHANGELOG.md
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Expand Up @@ -32,7 +32,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- Add missing interrupt status read for esp32s3, which fixes USB-SERIAL-JTAG interrupts (#664)
- GPIO interrupt status bits are now properly cleared (#670)
- Increase frequency resolution in `set_periodic` (#686)
- Fixed ESP32, ESP32-S2, ESP32-S3, ESP32-C2, ESP32-C3 radio clock gating (#679, #681, #709)
- Fixed ESP32-S2, ESP32-S3, ESP32-C2, ESP32-C3 radio clock gating (#679, #681)
- Partially fix ESP32 radio clocks (#709)

### Removed

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41 changes: 24 additions & 17 deletions esp-hal-common/src/soc/esp32/radio_clocks.rs
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Expand Up @@ -98,21 +98,28 @@ fn reset_mac() {
fn init_clocks() {
let dport = unsafe { &*esp32::DPORT::PTR };

const DPORT_WIFI_CLK_SDIOSLAVE_EN: u32 = 1 << 4;
const DPORT_WIFI_CLK_UNUSED_BIT5: u32 = 1 << 5;
const DPORT_WIFI_CLK_UNUSED_BIT12: u32 = 1 << 12;
const DPORT_WIFI_CLK_SDIO_HOST_EN: u32 = 1 << 13;
const DPORT_WIFI_CLK_EMAC_EN: u32 = 1 << 14;

const WIFI_BT_SDIO_CLK: u32 = DPORT_WIFI_CLK_WIFI_EN_M
| DPORT_WIFI_CLK_BT_EN_M
| DPORT_WIFI_CLK_UNUSED_BIT5
| DPORT_WIFI_CLK_UNUSED_BIT12
| DPORT_WIFI_CLK_SDIOSLAVE_EN
| DPORT_WIFI_CLK_SDIO_HOST_EN
| DPORT_WIFI_CLK_EMAC_EN;

dport
.wifi_clk_en
.modify(|r, w| unsafe { w.bits(r.bits() & !WIFI_BT_SDIO_CLK) });
// esp-idf assumes all clocks are enabled by default, and disables the following
// bits:
//
// ```
// const DPORT_WIFI_CLK_SDIOSLAVE_EN: u32 = 1 << 4;
// const DPORT_WIFI_CLK_UNUSED_BIT5: u32 = 1 << 5;
// const DPORT_WIFI_CLK_UNUSED_BIT12: u32 = 1 << 12;
// const DPORT_WIFI_CLK_SDIO_HOST_EN: u32 = 1 << 13;
// const DPORT_WIFI_CLK_EMAC_EN: u32 = 1 << 14;
//
// const WIFI_BT_SDIO_CLK: u32 = DPORT_WIFI_CLK_WIFI_EN_M
// | DPORT_WIFI_CLK_BT_EN_M
// | DPORT_WIFI_CLK_UNUSED_BIT5
// | DPORT_WIFI_CLK_UNUSED_BIT12
// | DPORT_WIFI_CLK_SDIOSLAVE_EN
// | DPORT_WIFI_CLK_SDIO_HOST_EN
// | DPORT_WIFI_CLK_EMAC_EN;
// ```
//
// However, we can't do this because somehow our initialization process is
// different, and disabling some bits, or not enabling them makes the BT
// stack crash.

dport.wifi_clk_en.write(|w| unsafe { w.bits(u32::MAX) });
}