Replace all concurrent assumes with ASSUME macro

Reproducible with the following sed command for named assumes:
sed -zi 's/\([a-zA-Z_][a-zA-Z0-9_]*\)[ \t\r\n]*:[ \t\r\n]*assume  *property[ \t\r\n]*([ \t\r\n]*@(posedge  *\([a-zA-Z_][a-zA-Z0-9_]*\))[ \t\r\n]*disable  *iff *([~!]\([^)]*\))[ \t\r\n]*\([^;]*\)[ \t\r\n]*)[ \t\r\n]*else[ \t\r\n]*\$fatal[ \t\r\n]*(1,[ \t\r\n]*\([^;]*\)[ \t\r\n]*);/`ASSUME(\1, \4, \2, !\3, \5)/g' src/*.sv

And the following sed command for unnamed assumes without reset and with
$error instead of $fatal:
sed -zi 's/assume  *property[ \t\r\n]*([ \t\r\n]*@(posedge  *\([a-zA-Z_][a-zA-Z0-9_]*\))[ \t\r\n]*\([^;]*\)[ \t\r\n]*)[ \t\r\n]*else[ \t\r\n]*\$error[ \t\r\n]*([ \t\r\n]*\([^;]*\)[ \t\r\n]*);/`ASSUME(NAME_ME, \2, \1, !rst_ni, \3)/g' src/*.sv

Requires cleanup to replace NAME_ME with a suitable property name.
Redundant parenthesis can be removed with the following command:
sed -i 's/`ASSUME(\([^,]*\), (\([^,]*\)),/`ASSUME(\1, \2,/g' src/*.sv

src/cdc_2phase_clearable.sv

@@ -258,9 +258,7 @@ module cdc_2phase_src_clearable #(
 // Assertions
 `ifndef COMMON_CELLS_ASSERTS_OFF
   `ifndef SYNTHESIS
-  no_clear_and_request: assume property (
-     @(posedge clk_i) disable iff(~rst_ni) (clear_i |-> ~valid_i))
-    else $fatal(1, "No request allowed while clear_i is asserted.");
+  `ASSUME(no_clear_and_request, clear_i |-> ~valid_i, clk_i, !rst_ni, "No request allowed while clear_i is asserted.")
 
   `endif
 `endif

src/rr_arb_tree.sv

@@ -179,11 +179,8 @@ module rr_arb_tree #(
 
           logic [NumIn-1:0] req_tmp;
           assign req_tmp = req_q & req_i;
-          lock_req: assume property(
-            @(posedge clk_i) disable iff (!rst_ni || flush_i)
-                LockIn |-> lock_d |=> req_tmp == req_q) else
-                $fatal (1, "It is disallowed to deassert unserved request signals when LockIn is \
-                            enabled.");
+          `ASSUME(lock_req, LockIn |-> lock_d |=> req_tmp == req_q, clk_i, !rst_ni || flush_i, "It is disallowed to deassert unserved request signals when LockIn is \
+                            enabled.")
         `endif
         `endif
 

src/stream_to_mem.sv

@@ -125,8 +125,7 @@ module stream_to_mem #(
     `ASSERT(counter_underflowed, cnt_q == '0 |=> cnt_q != '1, clk_i, !rst_ni, "Counter underflowed!")
     `ASSERT(counter_overflowed, cnt_q == BufDepth |=> cnt_q != BufDepth + 1, clk_i, !rst_ni, "Counter overflowed!")
   end else begin : gen_no_buf_asserts
-    assume property (@(posedge clk_i) mem_req_valid_o & mem_req_ready_i |-> mem_resp_valid_i)
-      else $error("Without BufDepth = 0, the memory must respond in the same cycle!");
+    `ASSUME(no_memory_response, mem_req_valid_o & mem_req_ready_i |-> mem_resp_valid_i, clk_i, !rst_ni, "Without BufDepth = 0, the memory must respond in the same cycle!")
   end
 `endif
 `endif