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Promote armv8r-none-eabihf target to Tier 2 #146520

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89a5bb6
Raise armv8r-none-eabihf to Tier 2
thejpster Sep 7, 2025
bfddf29
Update target spec to say Tier 2.
thejpster Sep 13, 2025
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2 changes: 1 addition & 1 deletion compiler/rustc_target/src/spec/targets/armv8r_none_eabihf.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ pub(crate) fn target() -> Target {
llvm_target: "armv8r-none-eabihf".into(),
metadata: TargetMetadata {
description: Some("Bare Armv8-R, hardfloat".into()),
tier: Some(3),
tier: Some(2),
host_tools: Some(false),
std: Some(false),
},
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2 changes: 1 addition & 1 deletion src/doc/rustc/src/platform-support.md
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Expand Up @@ -167,6 +167,7 @@ target | std | notes
[`armv7a-none-eabi`](platform-support/armv7a-none-eabi.md) | * | Bare Armv7-A
[`armv7r-none-eabi`](platform-support/armv7r-none-eabi.md) | * | Bare Armv7-R
[`armv7r-none-eabihf`](platform-support/armv7r-none-eabi.md) | * | Bare Armv7-R, hardfloat
[`armv8r-none-eabihf`](platform-support/armv8r-none-eabihf.md) | * | | Bare Armv8-R, hardfloat
`i586-unknown-linux-gnu` | ✓ | 32-bit Linux (kernel 3.2+, glibc 2.17, original Pentium) [^x86_32-floats-x87]
`i586-unknown-linux-musl` | ✓ | 32-bit Linux (musl 1.2.3, original Pentium) [^x86_32-floats-x87]
[`i686-linux-android`](platform-support/android.md) | ✓ | 32-bit x86 Android ([Pentium 4 plus various extensions](https://developer.android.com/ndk/guides/abis.html#x86)) [^x86_32-floats-return-ABI]
Expand Down Expand Up @@ -304,7 +305,6 @@ target | std | host | notes
[`armv7a-vex-v5`](platform-support/armv7a-vex-v5.md) | ? | | Armv7-A Cortex-A9 VEX V5 Brain, VEXos
[`armv7k-apple-watchos`](platform-support/apple-watchos.md) | ✓ | | Armv7-A Apple WatchOS
[`armv7s-apple-ios`](platform-support/apple-ios.md) | ✓ | | Armv7-A Apple-A6 Apple iOS
[`armv8r-none-eabihf`](platform-support/armv8r-none-eabihf.md) | * | | Bare Armv8-R, hardfloat
[`armv7a-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv7-A with NuttX
[`armv7a-nuttx-eabihf`](platform-support/nuttx.md) | ✓ | | ARMv7-A with NuttX, hardfloat
[`avr-none`](platform-support/avr-none.md) | * | | AVR; requires `-Zbuild-std=core` and `-Ctarget-cpu=...`
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2 changes: 1 addition & 1 deletion src/doc/rustc/src/platform-support/armv8r-none-eabihf.md
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@@ -1,6 +1,6 @@
# `armv8r-none-eabihf`

* **Tier: 3**
* **Tier: 2**
* **Library Support:** core and alloc (bare-metal, `#![no_std]`)

Bare-metal target for CPUs in the Armv8-R architecture family, supporting
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