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[RISC-V] Implement On Stack Replacement #1

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Merged
sirntar merged 31 commits into from
Dec 7, 2023
Merged

[RISC-V] Implement On Stack Replacement #1

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2803037
[RISC-V] Set OSR root frames reg for large offset
sirntar Nov 28, 2023
4eaddc1
[RISC-V] Enable OSR feature in cmake
sirntar Nov 28, 2023
bff6fe5
[RISC-V] Add config info about QuickJitForLoops
sirntar Nov 28, 2023
43b5a49
[RISC-V] Add osr ifdef directives to codegencommon
sirntar Nov 28, 2023
42c1b20
[RISC-V] Redesign FuncletFrameInfoDsc for OSR
sirntar Nov 29, 2023
c32d8a8
[RISC-V] Correct some assembly comments
sirntar Nov 29, 2023
fbd338a
[RISC-V] Rebuild genFuncletProlog for OSR
sirntar Nov 30, 2023
405bdab
[RISC-V] Add some documentation in coments
sirntar Dec 1, 2023
d2fb93b
[RISC-V] Fix potential issue for 0 calee-save regs
sirntar Dec 1, 2023
b799803
[RISC-V] Rebuild OSR epilog
sirntar Dec 1, 2023
53a6dc1
[RISC-V] Rebuild genCaptureFuncletPrologEpilogInfo for OSR
sirntar Dec 1, 2023
b306acb
[RISC-V] Add OSR support in genSetPSPSym
sirntar Dec 1, 2023
9ad6889
[RISC-V] Cosmetic changes in genSetRegToConst
sirntar Dec 1, 2023
3ad737d
[RISC-V] Add coment to genCodeForCpObj
sirntar Dec 1, 2023
f05be9c
[RISC-V] Cleanup in genCodeForCompare for OSR
sirntar Dec 1, 2023
1e13920
[RISC-V] Improve some SP/FP delta manimulations
sirntar Dec 1, 2023
058aadc
[RISC-V] Add OSR support to genSetGSSecurityCookie
sirntar Dec 1, 2023
4e0823e
[RISC-V] Implement genPushCalleeSavedRegisters for OSR
sirntar Dec 4, 2023
65324eb
[RISC-V] Implement genPopCalleeSavedRegisters for OSR
sirntar Dec 5, 2023
e2d6fd9
[RISC-V] Update vars for OSR in Compiler
sirntar Dec 5, 2023
05b50f2
[RISC-V] Update gcInfoBlockHdrSave for OSR
sirntar Dec 5, 2023
cba3bf6
[RISC-V] Enable TC_OnStackReplacement
sirntar Dec 5, 2023
9079076
[RISC-V] Correct compiler OSR vars
sirntar Dec 5, 2023
a940ddd
[RISC-V] Fix codegen definition
sirntar Dec 5, 2023
bf3dca9
[RISC-V] Correct spelling of SPtoCallerSPdelta
sirntar Dec 5, 2023
1c002d4
[RISC-V] Add missing semicolon
sirntar Dec 5, 2023
99a5d05
[RISC-V] Fix IsOSR is not a pointer member
sirntar Dec 5, 2023
5423fa9
[RISC-V] Fix OSR errors
sirntar Dec 5, 2023
1092662
[RISC-V] A little correction and cleanup
sirntar Dec 6, 2023
d6d8f4c
[RISC-V] Add some docs and small optimization changes
sirntar Dec 7, 2023
e6116dc
[RISC-V] Remove space before genCaptureFuncletPrologEpilogInfo
sirntar Dec 7, 2023
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[RISC-V] Update gcInfoBlockHdrSave for OSR
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@sirntar
sirntar committed Dec 5, 2023
commit 05b50f2a95de262981221d7d815da3c15b33692a
4 changes: 2 additions & 2 deletions src/coreclr/jit/gcencode.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3887,7 +3887,7 @@ void GCInfo::gcInfoBlockHdrSave(GcInfoEncoder* gcInfoEncoder, unsigned methodSiz
//
const int osrOffset = ppInfo->GenericContextArgOffset() - 2 * REGSIZE_BYTES;
assert(offset == osrOffset);
#elif defined(TARGET_ARM64) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARM64) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// PP info has virtual offset. This is also the caller SP offset.
//
const int osrOffset = ppInfo->GenericContextArgOffset();
Expand Down Expand Up @@ -3930,7 +3930,7 @@ void GCInfo::gcInfoBlockHdrSave(GcInfoEncoder* gcInfoEncoder, unsigned methodSiz
//
const int osrOffset = ppInfo->KeptAliveThisOffset() - 2 * REGSIZE_BYTES;
assert(offset == osrOffset);
#elif defined(TARGET_ARM64) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARM64) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// PP info has virtual offset. This is also the caller SP offset.
//
const int osrOffset = ppInfo->KeptAliveThisOffset();
Expand Down