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bd0d9a6
sys: bump capstone to 6.0.0-alpha4, fix arm64 and sysz rename
jiegec May 23, 2025
e794cd0
rs: rename arm64 -> aarch64 and sysz -> systemz to follow upstream
jiegec May 23, 2025
e8d28fa
rs: adapt to capstone v6 changes, mainly in aarch64
jiegec May 23, 2025
82776cf
rs: use aarch64_reg::Type for windows compat
jiegec May 23, 2025
b5ba6cd
rs: run cargo fmt to make ci happy
jiegec May 23, 2025
f819683
rs, sys: mention capstone 6.0.0-alpha4 and arch renaming in CHANGELOG
jiegec May 23, 2025
81b8f84
rs: avoid possible panics in library functions
jiegec May 23, 2025
c046d65
rs: add missing doc comments
jiegec May 23, 2025
cf181eb
rs, sys: generate arm_spsr_cspr_bits as bitfield enum
jiegec May 24, 2025
dbaa68d
rs: add previously failed testcase from issue 175
jiegec May 24, 2025
2434a33
ci: rename arch_arm64 to arch_aarch64 feature
jiegec May 24, 2025
fe0037b
sys: add Alpha arch support
jiegec May 24, 2025
30395c2
rs, sys: fix feature detection after renaming
jiegec May 24, 2025
4b82151
sys: add HPPA arch support
jiegec May 24, 2025
9262f5e
sys: add LoongArch arch support
jiegec May 24, 2025
0f406b2
sys: add Xtensa arch support
jiegec May 24, 2025
5de6e80
sys: add ARC arch support
jiegec May 24, 2025
4f00085
sys: move bpf bindings around to become in order
jiegec May 24, 2025
47ec2a7
rs: add Alpha arch support
jiegec May 24, 2025
2a17cf9
sys: fix build.rs lifetime for Rust 1.70.0
jiegec May 24, 2025
240bf5d
rs: add HPPA arch support
jiegec May 24, 2025
f16b5fd
rs: add LoongArch arch support
jiegec May 24, 2025
fd27c2c
rs: rename variable to reflect its type
jiegec May 24, 2025
82bf2e2
rs: disable failing hppa test due to upstream bug
jiegec May 24, 2025
bf6ed1f
rs: add Xtensa arch support
jiegec May 24, 2025
73c58d8
rs: fix tests on windows
jiegec May 24, 2025
65d5bdd
rs: add ARC arch support
jiegec May 24, 2025
f541a20
rs: fix type conversion on windows
jiegec May 24, 2025
265669b
rs: bump capstone to 6.0.0-Alpha4-8-gefc0ba44 to fix upstream bugs
jiegec May 26, 2025
b042b2a
rs: update tests after upstream bugs are fixed
jiegec May 26, 2025
804f160
rs: test CS_OPT_UNSIGNED using x86 code
jiegec May 26, 2025
9905c32
rs, sys: bump capstone to 6.0.0-Alpha4-13-gfe6bdc6e
jiegec Jun 15, 2025
202cf86
sys: bump capstone to 6.0.0-Alpha4-25-g717d8b05
jiegec Jul 9, 2025
f8f2520
rs: bump capstone to 6.0.0-Alpha4-25-g717d8b05
jiegec Jul 9, 2025
4b199bb
rs: add access mode to sparc operand
jiegec Jul 9, 2025
d878ee3
rs: document recent changes in CHANGELOG
jiegec Jul 9, 2025
05aea5d
rs: update tests for sparc, not a bug actually
jiegec Jul 9, 2025
6c99b35
rs: apply cargo clippy
jiegec Jul 9, 2025
0f57559
rs: fix tests on windows
jiegec Jul 9, 2025
36a2b30
rs, sys: bump capstone to 6.0.0-Alpha5
jiegec Aug 4, 2025
071ee66
rs: zero initialize cs_insn to make valgrind happy
jiegec Aug 4, 2025
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sys: add ARC arch support
  • Loading branch information
jiegec committed Aug 4, 2025
commit 5de6e80094305b3180c5d6e2da722d365a7b854b
2 changes: 2 additions & 0 deletions capstone-rs/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@ use_bindgen = ["capstone-sys/use_bindgen"]
# arch specific features to reduce binary size
support_all_archs = [
"arch_aarch64",
"arch_arc",
"arch_arm",
"arch_bpf",
"arch_evm",
Expand All @@ -62,6 +63,7 @@ support_all_archs = [
"capstone-sys/support_all_archs",
]
arch_aarch64 = ["capstone-sys/arch_aarch64"]
arch_arc = ["capstone-sys/arch_arc"]
arch_arm = ["capstone-sys/arch_arm"]
arch_bpf = ["capstone-sys/arch_bpf"]
arch_evm = ["capstone-sys/arch_evm"]
Expand Down
1 change: 1 addition & 0 deletions capstone-sys/CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- Support for HPPA arch
- Support for LoongArch arch
- Support for Xtensa arch
- Support for ARC arch
- Arch-specific features flags to enable/disable arch support
- Add `check_only` feature to speed up `cargo check` by building without native code
- Rename ARM64 to AARCH64, SYSZ to SYSTEMZ to follow upstream changes
Expand Down
2 changes: 2 additions & 0 deletions capstone-sys/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,7 @@ use_bindgen = ["bindgen", "regex"] # Dynamically generate bindings with bindgen
support_all_archs = [
"arch_aarch64",
"arch_alpha",
"arch_arc",
"arch_arm",
"arch_bpf",
"arch_evm",
Expand All @@ -63,6 +64,7 @@ support_all_archs = [
]
arch_aarch64 = []
arch_alpha = []
arch_arc = []
arch_arm = []
arch_bpf = []
arch_evm = []
Expand Down
1 change: 1 addition & 0 deletions capstone-sys/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -138,6 +138,7 @@ fn build_capstone_cc() {
arch_define!(
"arch_aarch64" = CAPSTONE_HAS_AARCH64,
"arch_alpha" = CAPSTONE_HAS_ALPHA,
"arch_arc" = CAPSTONE_HAS_ARC,
"arch_arm" = CAPSTONE_HAS_ARM,
"arch_bpf" = CAPSTONE_HAS_BPF,
"arch_evm" = CAPSTONE_HAS_EVM,
Expand Down
4 changes: 4 additions & 0 deletions capstone-sys/common.rs
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,10 @@ pub static ARCH_INCLUDES: &[CapstoneArchInfo<'static>] = &[
header_name: "alpha.h",
cs_name: "alpha",
},
CapstoneArchInfo {
header_name: "arc.h",
cs_name: "arc",
},
CapstoneArchInfo {
header_name: "arm.h",
cs_name: "arm",
Expand Down
281 changes: 281 additions & 0 deletions capstone-sys/pre_generated/capstone.rs
Original file line number Diff line number Diff line change
Expand Up @@ -27990,6 +27990,287 @@ impl ::core::fmt::Debug for cs_arc {
write!(f, "cs_arc {{ operands: {:?} }}", self.operands)
}
}
pub mod arc_reg {
#[doc = " ARC registers"]
pub type Type = libc::c_uint;
pub const ARC_REG_INVALID: Type = 0;
pub const ARC_REG_BLINK: Type = 1;
pub const ARC_REG_FP: Type = 2;
pub const ARC_REG_GP: Type = 3;
pub const ARC_REG_ILINK: Type = 4;
pub const ARC_REG_SP: Type = 5;
pub const ARC_REG_R0: Type = 6;
pub const ARC_REG_R1: Type = 7;
pub const ARC_REG_R2: Type = 8;
pub const ARC_REG_R3: Type = 9;
pub const ARC_REG_R4: Type = 10;
pub const ARC_REG_R5: Type = 11;
pub const ARC_REG_R6: Type = 12;
pub const ARC_REG_R7: Type = 13;
pub const ARC_REG_R8: Type = 14;
pub const ARC_REG_R9: Type = 15;
pub const ARC_REG_R10: Type = 16;
pub const ARC_REG_R11: Type = 17;
pub const ARC_REG_R12: Type = 18;
pub const ARC_REG_R13: Type = 19;
pub const ARC_REG_R14: Type = 20;
pub const ARC_REG_R15: Type = 21;
pub const ARC_REG_R16: Type = 22;
pub const ARC_REG_R17: Type = 23;
pub const ARC_REG_R18: Type = 24;
pub const ARC_REG_R19: Type = 25;
pub const ARC_REG_R20: Type = 26;
pub const ARC_REG_R21: Type = 27;
pub const ARC_REG_R22: Type = 28;
pub const ARC_REG_R23: Type = 29;
pub const ARC_REG_R24: Type = 30;
pub const ARC_REG_R25: Type = 31;
pub const ARC_REG_R30: Type = 32;
pub const ARC_REG_R32: Type = 33;
pub const ARC_REG_R33: Type = 34;
pub const ARC_REG_R34: Type = 35;
pub const ARC_REG_R35: Type = 36;
pub const ARC_REG_R36: Type = 37;
pub const ARC_REG_R37: Type = 38;
pub const ARC_REG_R38: Type = 39;
pub const ARC_REG_R39: Type = 40;
pub const ARC_REG_R40: Type = 41;
pub const ARC_REG_R41: Type = 42;
pub const ARC_REG_R42: Type = 43;
pub const ARC_REG_R43: Type = 44;
pub const ARC_REG_R44: Type = 45;
pub const ARC_REG_R45: Type = 46;
pub const ARC_REG_R46: Type = 47;
pub const ARC_REG_R47: Type = 48;
pub const ARC_REG_R48: Type = 49;
pub const ARC_REG_R49: Type = 50;
pub const ARC_REG_R50: Type = 51;
pub const ARC_REG_R51: Type = 52;
pub const ARC_REG_R52: Type = 53;
pub const ARC_REG_R53: Type = 54;
pub const ARC_REG_R54: Type = 55;
pub const ARC_REG_R55: Type = 56;
pub const ARC_REG_R56: Type = 57;
pub const ARC_REG_R57: Type = 58;
pub const ARC_REG_R58: Type = 59;
pub const ARC_REG_R59: Type = 60;
pub const ARC_REG_R60: Type = 61;
pub const ARC_REG_R61: Type = 62;
pub const ARC_REG_R62: Type = 63;
pub const ARC_REG_R63: Type = 64;
pub const ARC_REG_STATUS32: Type = 65;
pub const ARC_REG_ENDING: Type = 66;
}
#[repr(u32)]
#[doc = " ARC instruction"]
#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
pub enum arc_insn {
ARC_INS_INVALID = 0,
ARC_INS_h = 1,
ARC_INS_PBR = 2,
ARC_INS_ERROR_FLS = 3,
ARC_INS_ERROR_FFS = 4,
ARC_INS_PLDFI = 5,
ARC_INS_STB_FAR = 6,
ARC_INS_STH_FAR = 7,
ARC_INS_ST_FAR = 8,
ARC_INS_ADC = 9,
ARC_INS_ADC_F = 10,
ARC_INS_ADD_S = 11,
ARC_INS_ADD = 12,
ARC_INS_ADD_F = 13,
ARC_INS_AND = 14,
ARC_INS_AND_F = 15,
ARC_INS_ASL_S = 16,
ARC_INS_ASL = 17,
ARC_INS_ASL_F = 18,
ARC_INS_ASR_S = 19,
ARC_INS_ASR = 20,
ARC_INS_ASR_F = 21,
ARC_INS_BCLR_S = 22,
ARC_INS_BEQ_S = 23,
ARC_INS_BGE_S = 24,
ARC_INS_BGT_S = 25,
ARC_INS_BHI_S = 26,
ARC_INS_BHS_S = 27,
ARC_INS_BL = 28,
ARC_INS_BLE_S = 29,
ARC_INS_BLO_S = 30,
ARC_INS_BLS_S = 31,
ARC_INS_BLT_S = 32,
ARC_INS_BL_S = 33,
ARC_INS_BMSK_S = 34,
ARC_INS_BNE_S = 35,
ARC_INS_B = 36,
ARC_INS_BREQ_S = 37,
ARC_INS_BRNE_S = 38,
ARC_INS_BR = 39,
ARC_INS_BSET_S = 40,
ARC_INS_BTST_S = 41,
ARC_INS_B_S = 42,
ARC_INS_CMP_S = 43,
ARC_INS_CMP = 44,
ARC_INS_LD_S = 45,
ARC_INS_MOV_S = 46,
ARC_INS_EI_S = 47,
ARC_INS_ENTER_S = 48,
ARC_INS_FFS_F = 49,
ARC_INS_FFS = 50,
ARC_INS_FLS_F = 51,
ARC_INS_FLS = 52,
ARC_INS_ABS_S = 53,
ARC_INS_ADD1_S = 54,
ARC_INS_ADD2_S = 55,
ARC_INS_ADD3_S = 56,
ARC_INS_AND_S = 57,
ARC_INS_BIC_S = 58,
ARC_INS_BRK_S = 59,
ARC_INS_EXTB_S = 60,
ARC_INS_EXTH_S = 61,
ARC_INS_JEQ_S = 62,
ARC_INS_JL_S = 63,
ARC_INS_JL_S_D = 64,
ARC_INS_JNE_S = 65,
ARC_INS_J_S = 66,
ARC_INS_J_S_D = 67,
ARC_INS_LSR_S = 68,
ARC_INS_MPYUW_S = 69,
ARC_INS_MPYW_S = 70,
ARC_INS_MPY_S = 71,
ARC_INS_NEG_S = 72,
ARC_INS_NOP_S = 73,
ARC_INS_NOT_S = 74,
ARC_INS_OR_S = 75,
ARC_INS_SEXB_S = 76,
ARC_INS_SEXH_S = 77,
ARC_INS_SUB_S = 78,
ARC_INS_SUB_S_NE = 79,
ARC_INS_SWI_S = 80,
ARC_INS_TRAP_S = 81,
ARC_INS_TST_S = 82,
ARC_INS_UNIMP_S = 83,
ARC_INS_XOR_S = 84,
ARC_INS_LDB_S = 85,
ARC_INS_LDH_S = 86,
ARC_INS_J = 87,
ARC_INS_JL = 88,
ARC_INS_JLI_S = 89,
ARC_INS_LDB_AB = 90,
ARC_INS_LDB_AW = 91,
ARC_INS_LDB_DI_AB = 92,
ARC_INS_LDB_DI_AW = 93,
ARC_INS_LDB_DI = 94,
ARC_INS_LDB_X_AB = 95,
ARC_INS_LDB_X_AW = 96,
ARC_INS_LDB_X_DI_AB = 97,
ARC_INS_LDB_X_DI_AW = 98,
ARC_INS_LDB_X_DI = 99,
ARC_INS_LDB_X = 100,
ARC_INS_LDB = 101,
ARC_INS_LDH_AB = 102,
ARC_INS_LDH_AW = 103,
ARC_INS_LDH_DI_AB = 104,
ARC_INS_LDH_DI_AW = 105,
ARC_INS_LDH_DI = 106,
ARC_INS_LDH_S_X = 107,
ARC_INS_LDH_X_AB = 108,
ARC_INS_LDH_X_AW = 109,
ARC_INS_LDH_X_DI_AB = 110,
ARC_INS_LDH_X_DI_AW = 111,
ARC_INS_LDH_X_DI = 112,
ARC_INS_LDH_X = 113,
ARC_INS_LDH = 114,
ARC_INS_LDI_S = 115,
ARC_INS_LD_AB = 116,
ARC_INS_LD_AW = 117,
ARC_INS_LD_DI_AB = 118,
ARC_INS_LD_DI_AW = 119,
ARC_INS_LD_DI = 120,
ARC_INS_LD_S_AS = 121,
ARC_INS_LD = 122,
ARC_INS_LEAVE_S = 123,
ARC_INS_LR = 124,
ARC_INS_LSR = 125,
ARC_INS_LSR_F = 126,
ARC_INS_MAX = 127,
ARC_INS_MAX_F = 128,
ARC_INS_MIN = 129,
ARC_INS_MIN_F = 130,
ARC_INS_MOV_S_NE = 131,
ARC_INS_MOV = 132,
ARC_INS_MOV_F = 133,
ARC_INS_MPYMU = 134,
ARC_INS_MPYMU_F = 135,
ARC_INS_MPYM = 136,
ARC_INS_MPYM_F = 137,
ARC_INS_MPY = 138,
ARC_INS_MPY_F = 139,
ARC_INS_NORMH_F = 140,
ARC_INS_NORMH = 141,
ARC_INS_NORM_F = 142,
ARC_INS_NORM = 143,
ARC_INS_OR = 144,
ARC_INS_OR_F = 145,
ARC_INS_POP_S = 146,
ARC_INS_PUSH_S = 147,
ARC_INS_ROR = 148,
ARC_INS_ROR_F = 149,
ARC_INS_RSUB = 150,
ARC_INS_RSUB_F = 151,
ARC_INS_SBC = 152,
ARC_INS_SBC_F = 153,
ARC_INS_SETEQ = 154,
ARC_INS_SETEQ_F = 155,
ARC_INS_SEXB_F = 156,
ARC_INS_SEXB = 157,
ARC_INS_SEXH_F = 158,
ARC_INS_SEXH = 159,
ARC_INS_STB_S = 160,
ARC_INS_ST_S = 161,
ARC_INS_STB_AB = 162,
ARC_INS_STB_AW = 163,
ARC_INS_STB_DI_AB = 164,
ARC_INS_STB_DI_AW = 165,
ARC_INS_STB_DI = 166,
ARC_INS_STB = 167,
ARC_INS_STH_AB = 168,
ARC_INS_STH_AW = 169,
ARC_INS_STH_DI_AB = 170,
ARC_INS_STH_DI_AW = 171,
ARC_INS_STH_DI = 172,
ARC_INS_STH_S = 173,
ARC_INS_STH = 174,
ARC_INS_ST_AB = 175,
ARC_INS_ST_AW = 176,
ARC_INS_ST_DI_AB = 177,
ARC_INS_ST_DI_AW = 178,
ARC_INS_ST_DI = 179,
ARC_INS_ST = 180,
ARC_INS_SUB1 = 181,
ARC_INS_SUB1_F = 182,
ARC_INS_SUB2 = 183,
ARC_INS_SUB2_F = 184,
ARC_INS_SUB3 = 185,
ARC_INS_SUB3_F = 186,
ARC_INS_SUB = 187,
ARC_INS_SUB_F = 188,
ARC_INS_XOR = 189,
ARC_INS_XOR_F = 190,
}
pub mod arc_insn_group {
pub type Type = libc::c_uint;
#[doc = "< = CS_GRP_INVALID"]
pub const ARC_GRP_INVALID: Type = 0;
#[doc = "< = CS_GRP_JUMP"]
pub const ARC_GRP_JUMP: Type = 1;
#[doc = "< = CS_GRP_CALL"]
pub const ARC_GRP_CALL: Type = 2;
#[doc = "< = CS_GRP_RET"]
pub const ARC_GRP_RET: Type = 3;
#[doc = "< = CS_GRP_BRANCH_RELATIVE"]
pub const ARC_GRP_BRANCH_RELATIVE: Type = 4;
pub const ARC_GRP_ENDING: Type = 5;
}
#[doc = " NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON\n Initialized as memset(., 0, offsetof(cs_detail, ARCH)+sizeof(cs_ARCH))\n by ARCH_getInstruction in arch/ARCH/ARCHDisassembler.c\n if cs_detail changes, in particular if a field is added after the union,\n then update arch/ARCH/ARCHDisassembler.c accordingly"]
#[repr(C)]
#[derive(Copy, Clone)]
Expand Down
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