rs, sys: bump capstone to 6.0.0-Alpha4-13-gfe6bdc6e

capstone-rs/src/arch/aarch64.rs

@@ -7,7 +7,7 @@ use crate::arch::DetailsArchInsn;
 use crate::instruction::{AccessType, RegId, RegIdInt};
 use capstone_sys::{
     aarch64_imm_range, aarch64_op_mem, aarch64_op_pred, aarch64_op_sme, aarch64_op_type,
-    aarch64_sme_op_type, aarch64_sysop, cs_aarch64, cs_aarch64_op, cs_ac_type,
+    aarch64_sme_op_type, aarch64_sysop, cs_aarch64, cs_aarch64_op,
 };
 use core::convert::{From, TryInto};
 use core::{cmp, fmt, slice};
@@ -474,7 +474,7 @@ impl From<&cs_aarch64_op> for AArch64Operand {
             None
         };
         AArch64Operand {
-            access: cs_ac_type(op.access as _).try_into().ok(),
+            access: op.access.try_into().ok(),
             vector_index,
             vas: op.vas,
             shift,

capstone-rs/src/arch/arm.rs

@@ -4,7 +4,7 @@ use core::convert::{From, TryInto};
 use core::{cmp, fmt, slice};
 
 use capstone_sys::{
-    arm_op_mem, arm_op_type, arm_shifter, cs_ac_type, cs_arm, cs_arm_op, cs_arm_op__bindgen_ty_2,
+    arm_op_mem, arm_op_type, arm_shifter, cs_arm, cs_arm_op, cs_arm_op__bindgen_ty_2,
 };
 use libc::c_uint;
 
@@ -306,7 +306,7 @@ impl From<&cs_arm_op> for ArmOperand {
             shift,
             op_type,
             subtracted: op.subtracted,
-            access: cs_ac_type(op.access as _).try_into().ok(),
+            access: op.access.try_into().ok(),
         }
     }
 }
@@ -388,7 +388,7 @@ mod test {
                 type_: arm_op_type::ARM_OP_INVALID,
                 __bindgen_anon_1: cs_arm_op__bindgen_ty_2 { imm: 0 },
                 subtracted: false,
-                access: 0,
+                access: cs_ac_type(0),
                 neon_lane: 0,
             }; 36],
             vcc: VPTCodes::ARMVCC_None,

capstone-rs/src/arch/loongarch.rs

@@ -6,7 +6,7 @@ use core::{cmp, fmt, slice};
 pub use capstone_sys::loongarch_insn as LoongArchInsn;
 pub use capstone_sys::loongarch_reg as LoongArchReg;
 use capstone_sys::{
-    cs_ac_type, cs_loongarch, cs_loongarch_op, cs_loongarch_op__bindgen_ty_1, loongarch_op_mem,
+    cs_loongarch, cs_loongarch_op, cs_loongarch_op__bindgen_ty_1, loongarch_op_mem,
     loongarch_op_type,
 };
 
@@ -39,7 +39,7 @@ impl From<&cs_loongarch_op> for LoongArchOperand {
         let op_type = LoongArchOperandType::new(op.type_, op.__bindgen_anon_1);
         LoongArchOperand {
             op_type,
-            access: cs_ac_type(op.access as _).try_into().ok(),
+            access: op.access.try_into().ok(),
         }
     }
 }

capstone-rs/src/arch/m680x.rs

@@ -254,7 +254,7 @@ mod test {
             type_: m680x_op_type::M680X_OP_INVALID,
             __bindgen_anon_1: cs_m680x_op__bindgen_ty_1 { reg: 0 },
             size: 1,
-            access: 0,
+            access: cs_ac_type(0),
         };
 
         assert_eq!(

capstone-rs/src/arch/mips.rs

@@ -102,7 +102,7 @@ mod test {
             __bindgen_anon_1: cs_mips_op__bindgen_ty_1 { reg: 0 },
             is_reglist: false,
             is_unsigned: false,
-            access: 0,
+            access: cs_ac_type(0),
         };
         assert_eq!(MipsOperand::from(&op), MipsOperand::Invalid);
     }

capstone-rs/src/arch/x86.rs

@@ -15,7 +15,7 @@ pub use capstone_sys::x86_reg as X86Reg;
 pub use capstone_sys::x86_sse_cc as X86SseCC;
 pub use capstone_sys::x86_xop_cc as X86XopCC;
 use capstone_sys::{
-    cs_ac_type, cs_x86, cs_x86_op, cs_x86_op__bindgen_ty_1, x86_op_mem, x86_op_type,
+    cs_x86, cs_x86_op, cs_x86_op__bindgen_ty_1, x86_op_mem, x86_op_type,
 };
 
 use super::InsnOffsetSpan;
@@ -233,7 +233,7 @@ impl From<&cs_x86_op> for X86Operand {
         let op_type = X86OperandType::new(op.type_, op.__bindgen_anon_1);
         X86Operand {
             size: op.size,
-            access: cs_ac_type(op.access as _).try_into().ok(),
+            access: op.access.try_into().ok(),
             avx_bcast: op.avx_bcast,
             avx_zero_opmask: op.avx_zero_opmask,
             op_type,
@@ -369,7 +369,7 @@ mod test {
                 size: 0,
                 avx_bcast: x86_avx_bcast::X86_AVX_BCAST_INVALID,
                 avx_zero_opmask: false,
-                access: 0,
+                access: cs_ac_type(0),
             }; 8],
         };
         let mut a2 = a1;

capstone-rs/src/arch/xtensa.rs

@@ -6,8 +6,8 @@ use core::{cmp, fmt, slice};
 pub use capstone_sys::xtensa_insn as XtensaInsn;
 pub use capstone_sys::xtensa_reg as XtensaReg;
 use capstone_sys::{
-    cs_ac_type, cs_xtensa, cs_xtensa_op, cs_xtensa_op_mem, cs_xtensa_op_type,
-    cs_xtensa_operand__bindgen_ty_1,
+    cs_xtensa, cs_xtensa_op, cs_xtensa_op_mem, cs_xtensa_op_type,
+    cs_xtensa_op__bindgen_ty_1,
 };
 
 pub use crate::arch::arch_builder::xtensa::*;
@@ -39,7 +39,7 @@ impl From<&cs_xtensa_op> for XtensaOperand {
         let op_type = XtensaOperandType::new(op.type_, op.__bindgen_anon_1);
         XtensaOperand {
             op_type,
-            access: cs_ac_type(op.access as _).try_into().ok(),
+            access: op.access.try_into().ok(),
         }
     }
 }
@@ -56,12 +56,6 @@ pub enum XtensaOperandType {
     /// Memory
     Mem(XtensaOpMem),
 
-    /// Memory register
-    MemReg(RegId),
-
-    /// Memory immediate
-    MemImm(i32),
-
     /// L32R target
     L32R(i32),
 
@@ -70,7 +64,7 @@ pub enum XtensaOperandType {
 }
 
 impl XtensaOperandType {
-    fn new(op_type: u8, value: cs_xtensa_operand__bindgen_ty_1) -> XtensaOperandType {
+    fn new(op_type: cs_xtensa_op_type::Type, value: cs_xtensa_op__bindgen_ty_1) -> XtensaOperandType {
         match op_type as cs_xtensa_op_type::Type {
             cs_xtensa_op_type::XTENSA_OP_REG => {
                 XtensaOperandType::Reg(RegId(unsafe { value.reg } as RegIdInt))
@@ -79,10 +73,6 @@ impl XtensaOperandType {
             cs_xtensa_op_type::XTENSA_OP_MEM => {
                 XtensaOperandType::Mem(XtensaOpMem(unsafe { value.mem }))
             }
-            cs_xtensa_op_type::XTENSA_OP_MEM_REG => {
-                XtensaOperandType::MemReg(RegId(unsafe { value.reg } as RegIdInt))
-            }
-            cs_xtensa_op_type::XTENSA_OP_MEM_IMM => XtensaOperandType::MemImm(unsafe { value.imm }),
             cs_xtensa_op_type::XTENSA_OP_L32R => XtensaOperandType::L32R(unsafe { value.imm }),
             _ => XtensaOperandType::Invalid,
         }

capstone-sys/capstone/.clang-format

@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: GPL-2.0
+# SPDX-License-Identifier: BSD-3-Clause
 #
 # clang-format configuration file. Intended for clang-format >= 11.
 #

capstone-sys/capstone/CMakeLists.txt

@@ -287,7 +287,6 @@ if(CAPSTONE_AARCH64_SUPPORT)
         arch/AArch64/AArch64GenDisassemblerTables.inc
         arch/AArch64/AArch64GenInstrInfo.inc
         arch/AArch64/AArch64GenRegisterInfo.inc
-        arch/AArch64/AArch64GenRegisterName.inc
         arch/AArch64/AArch64GenSubtargetInfo.inc
         arch/AArch64/AArch64GenSystemOperands.inc
         arch/AArch64/AArch64GenCSMappingInsn.inc

capstone-sys/capstone/MCInst.c

@@ -319,3 +319,13 @@ void MCInst_updateWithTmpMI(MCInst *MI, MCInst *TmpMI) {
 	assert(MI->size < MAX_MC_OPS);
 	memcpy(MI->Operands, TmpMI->Operands, sizeof(MI->Operands[0]) * MI->size);
 }
+
+/// @brief Sets the softfail/illegal flag in the cs_insn.
+/// Setting it indicates the instruction can be decoded, but is invalid
+/// due to not allowed operands or an illegal context.
+///
+/// @param MI The MCInst holding the cs_insn currently decoded.
+void MCInst_setSoftFail(MCInst *MI) {
+	assert(MI && MI->flat_insn);
+	MI->flat_insn->illegal = true;
+}

capstone-sys/capstone/MCInst.h

@@ -179,4 +179,6 @@ static inline bool MCInst_isAlias(const MCInst *MI) {
 
 void MCInst_updateWithTmpMI(MCInst *MI, MCInst *TmpMI);
 
+void MCInst_setSoftFail(MCInst *MI);
+
 #endif

capstone-sys/capstone/SStream.c

@@ -26,6 +26,13 @@ void SStream_Init(SStream *ss)
 	ss->is_closed = false;
 	ss->markup_stream = false;
 	ss->prefixed_by_markup = false;
+	ss->unsigned_num = false;
+}
+
+void SStream_opt_unum(SStream *ss, bool print_unsigned_numbers)
+{
+	assert(ss);
+	ss->unsigned_num = print_unsigned_numbers;
 }
 
 /// Returns the a pointer to the internal string buffer of the stream.
@@ -224,6 +231,10 @@ void SStream_concat(SStream *ss, const char *fmt, ...)
 void printInt64Bang(SStream *ss, int64_t val)
 {
 	assert(ss);
+	if (ss->unsigned_num) {
+		printUInt64Bang(ss, val);
+		return;
+	}
 	SSTREAM_RETURN_IF_CLOSED(ss);
 	SStream_concat1(ss, '#');
 	printInt64(ss, val);
@@ -241,6 +252,10 @@ void printUInt64Bang(SStream *ss, uint64_t val)
 void printInt64(SStream *ss, int64_t val)
 {
 	assert(ss);
+	if (ss->unsigned_num) {
+		printUInt64(ss, val);
+		return;
+	}
 	SSTREAM_RETURN_IF_CLOSED(ss);
 	if (val >= 0) {
 		if (val > HEX_THRESHOLD)
@@ -286,14 +301,40 @@ void printInt32BangDec(SStream *ss, int32_t val)
 void printInt32Bang(SStream *ss, int32_t val)
 {
 	assert(ss);
+	if (ss->unsigned_num) {
+		printUInt32Bang(ss, val);
+		return;
+	}
 	SSTREAM_RETURN_IF_CLOSED(ss);
 	SStream_concat1(ss, '#');
 	printInt32(ss, val);
 }
 
+void printUInt8(SStream *ss, uint8_t val)
+{
+	assert(ss);
+	if (val > HEX_THRESHOLD)
+		SStream_concat(ss, "0x%"PRIx8, val);
+	else
+		SStream_concat(ss, "%"PRIu8, val);
+}
+
+void printUInt16(SStream *ss, uint16_t val)
+{
+	assert(ss);
+	if (val > HEX_THRESHOLD)
+		SStream_concat(ss, "0x%"PRIx16, val);
+	else
+		SStream_concat(ss, "%"PRIu16, val);
+}
+
 void printInt8(SStream *ss, int8_t val)
 {
 	assert(ss);
+	if (ss->unsigned_num) {
+		printUInt8(ss, val);
+		return;
+	}
 	SSTREAM_RETURN_IF_CLOSED(ss);
 	if (val >= 0) {
 		if (val > HEX_THRESHOLD)
@@ -314,6 +355,10 @@ void printInt8(SStream *ss, int8_t val)
 void printInt16(SStream *ss, int16_t val)
 {
 	assert(ss);
+	if (ss->unsigned_num) {
+		printUInt16(ss, val);
+		return;
+	}
 	SSTREAM_RETURN_IF_CLOSED(ss);
 	if (val >= 0) {
 		if (val > HEX_THRESHOLD)
@@ -334,6 +379,10 @@ void printInt16(SStream *ss, int16_t val)
 void printInt16HexOffset(SStream *ss, int16_t val)
 {
 	assert(ss);
+	if (ss->unsigned_num) {
+		printUInt16(ss, val);
+		return;
+	}
 	SSTREAM_RETURN_IF_CLOSED(ss);
 	if (val >= 0) {
 		SStream_concat(ss, "+0x%" PRIx16, val);
@@ -350,6 +399,10 @@ void printInt16HexOffset(SStream *ss, int16_t val)
 void printInt32(SStream *ss, int32_t val)
 {
 	assert(ss);
+	if (ss->unsigned_num) {
+		printUInt32(ss, val);
+		return;
+	}
 	SSTREAM_RETURN_IF_CLOSED(ss);
 	if (val >= 0) {
 		if (val > HEX_THRESHOLD)
@@ -371,6 +424,10 @@ void printInt32(SStream *ss, int32_t val)
 void printInt32HexOffset(SStream *ss, int32_t val)
 {
 	assert(ss);
+	if (ss->unsigned_num) {
+		printUInt32(ss, val);
+		return;
+	}
 	SSTREAM_RETURN_IF_CLOSED(ss);
 	if (val >= 0) {
 		SStream_concat(ss, "+0x%" PRIx32, val);

capstone-sys/capstone/SStream.h

@@ -22,6 +22,7 @@ typedef struct SStream {
 	bool is_closed;
 	bool markup_stream; ///< If true, markups to the stream are allowed.
 	bool prefixed_by_markup; ///< Set after the stream wrote a markup for an operand.
+	bool unsigned_num; ///< Print all numbers as unsigned. Set with CS_OPT_UNSIGNED.
 } SStream;
 
 #define SSTREAM_OVERFLOW_CHECK(OS, len) \
@@ -39,6 +40,7 @@ do { \
 } while(0)
 
 void SStream_Init(SStream *ss);
+void SStream_opt_unum(SStream *ss, bool print_unsigned_numbers);
 
 const char *SStream_replc(const SStream *ss, char elem, char repl);
 
@@ -81,6 +83,8 @@ void printInt32HexOffset(SStream *ss, int32_t val);
 
 void printUInt32Bang(SStream *O, uint32_t val);
 
+void printUInt8(SStream *ss, uint8_t val);
+void printUInt16(SStream *ss, uint16_t val);
 void printUInt32(SStream *O, uint32_t val);
 
 // print number in decimal mode