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add gicv3 and dtb, and chenge arm physical timer into virt timer
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lhw committed Mar 13, 2025
commit 2b6e9c0a376b08d04aac23df6867080b7e7946b1
5 changes: 3 additions & 2 deletions Cargo.lock

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3 changes: 2 additions & 1 deletion Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,7 @@ members = [
"modules/ruxconfig",
"modules/ruxdisplay",
"modules/ruxdriver",
"modules/ruxdtb",
"modules/ruxfdtable",
"modules/ruxfs",
"modules/ruxhal",
Expand All @@ -63,7 +64,7 @@ members = [

"apps/display/basic_painting",
"apps/display/draw_map",
"apps/fs/shell", "modules/ruxdtb",
"apps/fs/shell",
]

[profile.release]
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2 changes: 1 addition & 1 deletion api/ruxfeat/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ fp_simd = ["ruxhal/fp_simd", "ruxfs/fp_simd"]

# Interrupts
irq = ["ruxhal/irq", "ruxruntime/irq", "ruxtask?/irq"]
gic-v3 = ["ruxhal/gic-v3"]
gic-v3 = ["ruxhal/gic-v3","ruxruntime/gic-v3"]

# Real time clock
rtc = ["ruxhal/rtc", "ruxruntime/rtc"]
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1 change: 0 additions & 1 deletion api/ruxos_posix_api/src/imp/mmap/trap.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,6 @@ struct TrapHandlerImpl;
#[crate_interface::impl_interface]
impl ruxhal::trap::TrapHandler for TrapHandlerImpl {
fn handle_page_fault(vaddr: usize, cause: PageFaultCause) -> bool {
info!("lhw debug in handle_page_fault addr {:x} case {:?}",vaddr, cause);
let binding_task = current();
let mut binding_mem_map = binding_task.mm.vma_map.lock();
let vma_map = binding_mem_map.deref_mut();
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121 changes: 0 additions & 121 deletions app_eval.py

This file was deleted.

3 changes: 0 additions & 3 deletions apps/c/helloworld/features.txt

This file was deleted.

11 changes: 5 additions & 6 deletions apps/c/httpclient/expect_info.out
Original file line number Diff line number Diff line change
Expand Up @@ -31,13 +31,12 @@ Primary CPU 0 init OK.
Hello, Ruxos C HTTP client!
IP: [0-9]\+\.[0-9]\+\.[0-9]\+\.[0-9]\+
HTTP/1.1 200 OK
Server: nginx
Date:
Content-Type: text/plain
Content-Length:
Connection: keep-alive
Access-Control-Allow-Origin: *
Alt-Svc: h3=":443"; ma=
Cache-Control: no-cache, no-store, must-revalidate
Date:
Content-Length:
Content-Type: text/plain; charset=utf-8

^[0-9]\+\.[0-9]\+\.[0-9]\+\.[0-9]\+
Shutting down...
Shutting down...
4 changes: 1 addition & 3 deletions crates/arm_gic/src/gic_v2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@

use core::ptr::NonNull;

use crate::{TriggerMode, GIC_MAX_IRQ, SPI_RANGE, read_sysreg, write_sysreg};
use crate::{TriggerMode, GIC_MAX_IRQ, SPI_RANGE};
use tock_registers::interfaces::{Readable, Writeable};
use tock_registers::register_structs;
use tock_registers::registers::{ReadOnly, ReadWrite, WriteOnly};
Expand Down Expand Up @@ -218,8 +218,6 @@ impl GicDistributor {
}
}

use log::info;

impl GicCpuInterface {
/// Construct a new GIC CPU interface instance from the base address.
pub const fn new(base: *mut u8) -> Self {
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